SystemVerilog Jobs

C++Machine learning RTL design Formal verification SystemVerilog

Experience with the full digital design verification cycle -- from spec through bring-up Experience with performance and power validation, digital design…

ML Accelerator Architect

Waymo

Mountain View, CA, US; New York City, NY, US15d ago

Lead

C++Machine learning SystemVerilog Problem solving

1+ years modeling high performance architectures in cycle-aware simulators Track record of analyzing workloads and architecting, delivering novel HW+SW…

Physical Design Lead

Waymo

Mountain View, CA, USA15d ago

Lead

Physical design SystemVerilog Verilog

Track record of successfully driving custom / semi-custom silicon engagements with external partners Experience with automotive silicon quality, reliability,…

Senior Design Engineer, ASIC

Waymo

Mountain View, CA, USA15d ago

Senior

Python C++Machine learning ASIC design RTL design Physical design Formal verification SystemVerilog Verilog

Master's or PhD degree in Engineering Experience leading or managing engineering teams Experience with the full digital design verification cycle -- from spec…

Senior Formal Verification Engineer

Waymo

Taipei, Taiwan; Hsinchu, Taiwan15d ago

Senior

Python C++CI/CD Synopsys Cadence Formal verification SystemVerilog Mentoring Ownership

Define and drive formal strategy for first-pass silicon success. Own the formal verification sign-off approach across complex IP and SoC designs, utilizing…

Silicon Emulation Architect

Waymo

Mountain View, CA, USA15d ago

Lead

Python C++CI/CD Linux Data analysis SystemVerilog Problem solving

Experience with AXI/AMBA, PCIe, DRAM, and Ethernet interfaces Performance and power analysis techniques Experience with JTAG, DFT, UART, SPI, GPIO and other…

Silicon Emulation Engineer

Waymo

Taipei, Taiwan; Hsinchu, Taiwan15d ago

Python C++CI/CD Linux Data analysis SystemVerilog Problem solving

Experience with AXI/AMBA, PCIe, DRAM, and Ethernet interfaces Performance and power analysis techniques Experience with JTAG, DFT, UART, SPI, GPIO and other…

FPGA Associate (Winter 2026)

Astranis

Security RTL design FPGA SystemVerilog Verilog

Astranis builds advanced satellites for high orbits, expanding humanity’s reach into the solar system. Today, Astranis satellites provide dedicated, secure…

FPGA Intern (Winter 2026)

Astranis

Security RTL design FPGA SystemVerilog Verilog

Astranis builds advanced satellites for high orbits, expanding humanity’s reach into the solar system. Today, Astranis satellites provide dedicated, secure…

Design Verification (DV) Engineer

Hudson River Trading

Austin, TX, United States; Chicago, Illinois, United States; London, United Kingdom; New York, NY, United States15d ago

Python C++CI/CD Linux Machine learning ASIC design RTL design FPGA SystemVerilog Verilog

Superb debug and analytical skills Professional experience (2+ years) in RTL functional verification for FPGA or ASIC Experience with code and functional…

Experienced Hardware Design Engineer

Hudson River Trading

Austin, TX, United States; Boulder, Colorado, United States; Chicago, Illinois, United States; New York, NY, United States15d ago

Python C++Linux Machine learning ASIC design RTL design FPGA SystemVerilog Problem solving

Ability to describe hardware designs at a high level, low level, or anywhere in between Brilliant design, optimization, debugging and problem solving skills…

Hardware Design Engineer - 2026 Grads

Hudson River Trading

Chicago, Illinois, United States; New York, NY, United States15d ago

Python C++Linux Machine learning ASIC design RTL design FPGA SystemVerilog Problem solving

Currently pursuing a Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for…

Graduate Hardware Engineer

IMC

Chicago, United States15d ago

Python C++RTL design SystemVerilog Verilog VHDL Mentoring

Current university student graduating between September 2025 – July 2026 that is pursuing a degree in Electrical Engineering, Computer Engineering, or a…

Graduate Hardware Engineer (2026)

IMC

Amsterdam, Netherlands15d ago

Python C++FPGA SystemVerilog Verilog VHDL Problem solving Mentoring Code review

Recently graduated (or graduating by 2026) with a degree in Computer Science, Software Engineering, Electrical Engineering, or a related discipline Experience…

Hardware Engineer, Early Career

IMC

Chicago, United States15d ago

Python C++RTL design SystemVerilog Verilog VHDL Mentoring

1-3 years of full-time professional work experience post-graduation BA/BSc/MA/MSc in Electrical Engineering, Computer Engineering or related degree Proficient…

Hardware Machine Learning Engineer

IMC

Chicago, United States; New York, United States15d ago

Fremont, California, United States16d ago

Python C++Machine learning Deep learning ASIC design RTL design FPGA SystemVerilog Verilog VHDL+3

Extensive experience with FPGA or ASIC technologies, including proficiency in either VHDL, Verilog, or SystemVerilog Solid understanding of digital design…

Analog and Mixed-Signal IC Design Engineer Intern

Neuralink

Intern

Fremont, California, United States15d ago

SystemVerilog Verilog

Minimum 1 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL,…

Analog IC Design and Verification Engineer

Neuralink

Austin, Texas, United States; Fremont, California, United States15d ago

SystemVerilog Verilog

Bachelor of Science degree and additional experience in a related technical field for at least 5 years after receiving the BS degree Minimum 5 years of…

Digital IC Design Engineer

Neuralink

Python C++Machine learning RTL design Physical design SystemVerilog

Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience Evidence of exceptional…

Digital IC Design Engineer Intern

Neuralink

Fremont, California, United States15d ago

Intern